Vikash Kumar is a Senior Engineer at Arm with over 14 years of experience in the design and verification of semiconductor chips across IP, subsystem, and full System-on-Chip (SoC) levels. His work spans complex SoC integration challenges using Verilog, SystemVerilog, and UVM, with a strong focus on functional correctness, debug, and verification closure in high-performance designs. Prior to joining Arm, Vikash held engineering roles at Aricent Technologies and Intel, contributing to multiple large-scale silicon programs. He has hands-on experience with industry-standard protocols including AMBA (AXI), CHI5, PCIe, and UCIe, and has worked extensively on integration-level verification where subtle cross-boundary assumptions often lead to late-stage escapes. Vikash is also a Senior Member of IEEE and is particularly interested in shift-left verification methodologies, subsystem intent modeling, and improving SoC verification predictability through structured, scalable approaches.